Integrated circuits are commonly fabricated on and within a surface region of a semiconductor substrate, such as a wafer of silicon. During such fabrication, various layers are produced within the substrate or deposited thereon. Some of these layers are then sized and dimensioned to form desired geometric patterns by means of various etching techniques. Such etching techniques include "wet" etching techniques, which typically use one or more chemical reagents brought into direct contact with the substrate, or "dry" etching techniques such as plasma etching.
Numerous plasma-based etching techniques are known in the art, including what is commonly called the plasma etching mode, as well as reactive ion etching and reactive ion beam etching. In any of the wide variety of plasma etching techniques, a plasma is created from gas introduced into a reaction chamber. One or more electrodes (commonly driven by an RF generator) generate the plasma by disassociation of the gas molecules into various ions, free radicals, and electrons. The plasma then reacts with material being etched from the semiconductor wafer.
FIG. 1 depicts the major components of a prior art plasma etching system 10, such as the Lam 9100, manufactured by Lam Research, Inc. The etching system 10 includes a reaction chamber 12 having a chamber wall 14, which is typically grounded. An electrode, such as a planar coil electrode 16, is positioned adjacent to a dielectric structure 18 separating the electrode 16 from the interior of the reaction chamber 12. Source gases, from which the plasma is generated, are provided by a gas supply 20. The gas supply 20 is coupled with the reaction chamber 12 by a gas control panel 22, which selects and controls the flow of source gases into the chamber. Volatile reaction products, unreacted plasma species, and other gases are removed from the reaction chamber 12 by a gas removal mechanism, such as a vacuum pump 24 and throttle valve 26.
The dielectric structure 18 depicted in FIG. 1 may serve multiple purposes and have correspondingly multiple structural features, as is well known in the art. For example, the dielectric structure 18 may include features for introducing the source gases into the reaction chamber 12, as well as those structures associated with physically separating the electrode 16 from the interior of the chamber.
Electrical power such as a high voltage signal is applied to the electrode 16 to ignite and sustain a plasma within the reaction chamber 12. The high voltage signal is provided by a power generator, such as an RF generator 28. The RF generator 28 is coupled with one end of the planar coil electrode 16 by a matching network 30, which functions primarily to match impedances, as is well known in the art. The other end of the planar coil electrode 16 is coupled to ground potential by a terminal capacitor 32 or C.sub.T. The terminal capacitor C.sub.T is oftentimes included within the matching network 30, but is depicted separately in FIG. 1 for illustrative purposes.
Ignition of a plasma within the reaction chamber 12 occurs primarily by electrostatic coupling of the electrode 16 with the source gases, due to the large magnitude voltage applied to the electrode and the resulting electric fields produced within the reaction chamber. Once ignited, the plasma is sustained by electromagnetic induction effects associated with a time-varying magnetic fields caused by the alternating currents applied to the electrode 16. A semiconductor wafer 34 is positioned within the reaction chamber 12 and is supported by a wafer platform or chuck 36. The chuck 36 is typically electrically biased to provide ion energies impacting the wafer 34 that are approximately independent of the RF voltage applied to the electrode 16.
Typically, the voltage varies as a function of position along the coil electrode 16, with relatively higher amplitude voltages occurring at certain positions along the electrode 16, and relatively lower amplitude voltages occurring at other positions along the electrode. A large electric field strength is required to ignite plasmas within the reaction chamber 12. To create such a field, it is desirable to provide the relatively higher amplitude voltages at locations along the electrode 16 which are close to the grounded chamber wall 14.
Referring to FIG. 2, a graphical representation depicts the relative amplitudes of the voltages at locations along the electrode 16, with location A representing a position near the center of the coil electrode and location B representing a location near an outer end of the electrode (see FIG. 1). For the coil electrode 16 used in the Lam 9100, selecting a relatively small capacitance value for the terminal capacitor C.sub.T produces the higher amplitude voltages at location B, whereas selecting a relatively large capacitance value produces the higher amplitude voltages at location A. Thus, in this example, selecting a relatively small capacitance value for the terminal capacitor C.sub.T enhances efficient ignition of plasmas within the reaction chamber 12. Of course, voltage amplitudes produced by electrodes of different configurations and/or effective electrical lengths may vary with C.sub.T other than described for the electrode 16.
As is known to those skilled in the art, producing the relatively higher amplitude voltages at positions away from the center of the electrode 16 results in improved etching uniformity, especially improved uniformity of etching depth and profile. However, locating the relatively higher amplitude voltages near the grounded chamber wall 14 also can result in increased sputtering effects on the dielectric structure 18. The electric field between the chamber wall 14 and the dielectric structure 18 causes ion impact on the dielectric structure. This may sputter polymer or other deposits from the dielectric structure, or sputter the dielectric structure itself, and possibly cause contamination of the semiconductor wafer 34. Thus, an unfortunate tradeoff exists in which conditions conducive to plasma ignition and etching uniformity also increase potential contamination effects.